Process application
Gate high K dielectric layer and metal layer, deep groove (depth width ratio>200) MIM structure, TSV deep hole coating.

---

Wafer size
8 inches and below

---

Sedimentary materials
Al2O3、TiO2、SiO2、HfO2、ZrO2、Ta2O5、ZrO2、 La2O3、AlN、TiN、 TaNx 、Cu、Co﹑Ru et al

---

Application area
GaN HEMT power semiconductor, SiC MOS-FET power semiconductor, ferroelectric memory FRAM, MEMS, 8-inch integrated circuit IC, 3D package.